1. Field of the Invention
The present invention relates to a method for forming a sensor, and more particularly, to a method for forming a CMOS sensor where the ion implantation within the regions of field isolation of the sensor photo-diode array is implemented separately from the ion implantation within NMOS.
2. Description of the Prior Art
Integrating photocell area-array image sensors with signal processing circuits on one chip using complementary metal oxide semiconductor (CMOS) technology is currently under heavy development for emerging multimedia applications. Presentations on this topic were included in the IEEE ISSCC conferences of '96 and'97. A variety of methods are used to form semiconductor image sensors on a substrate with CMOS devices.
The traditional process for image sensor fabrication is simultaneously completed with NMOS. As shown in FIG. 1, for a CMOS sensor consisting of the portions of sensor photo-diode array 5, NMOS 7 and PMOS 9, a semiconductor structure is provided with a semiconductor layer 100, P-epitaxial layer 110, P-well 130, N-well 120 and gate structure 150. A plurality of field regions 140 of sensor photo-diode array, bounded with P-well, are formed simultaneously with a source/drain 160 of NMOS. Thus, such a fabrication results in high impurity concentration within the region of sensor photo-diode array and the doses of ion implantation within the region of the sensor photo-diode array are as high as ones within NMOS.
However, in the region of the sensor photo-diode array, a junction that collects carriers induced by incident light, forming in a highly doped region, will result in a large capacitance. That is, the large capacitance reduces the amount of charge that can be transferred from the photo sensing element to other electronics and the detection sensitivity decreases. Furthermore, because of higher dose of field region within the region of sensor photo-diode array, it is difficult to meet the requirements of isolation and low dark current required for the image sensor.